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data/lib/ast.rb CHANGED
@@ -23,4 +23,11 @@ module VHDL_TB
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"#{self.name}(#{self.lhs} #{self.dir} #{self.rhs})"
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end
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end
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+
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+
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+ Binary=Struct.new(:lhs,:op,:rhs) do
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+ def to_s
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+ "#{self.lhs} #{self.op} #{self.rhs}"
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+ end
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+ end
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33
end
data/lib/compiler.rb CHANGED
@@ -4,6 +4,7 @@ require 'optparse'
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4
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require_relative 'ast'
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require_relative 'parser'
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+ require_relative 'version'
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module VHDL_TB
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@@ -11,8 +12,6 @@ module VHDL_TB
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class Compiler
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- VERSION = "0.7.0"
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-
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def initialize
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#puts __dir__
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banner
data/lib/lexer.rb CHANGED
@@ -107,7 +107,7 @@ module VHDL_TB
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keyword 'xorkeyword '
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#.............................................................
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- token :comments => /\A\-\-(.*)#x2F;
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+ token :comment => /\A\-\-(.*)#x2F;
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token :selected_name => /\w+(\.\w+)+/ # /\S+\w+\.\w+/
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token :identifier => /[a-zA-Z]\w*/
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@@ -126,6 +126,7 @@ module VHDL_TB
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token :plus => /\A\+/
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token :minus => /\A\-/
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token :times => /\A\*/
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+ token :div => /\A\//
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token :sassign => /\A\<\=/
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token :imply => /\A\=\>/
@@ -136,6 +137,7 @@ module VHDL_TB
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token :gt => /\A\>/
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token :lt => /\A\</
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token :urange => /\A<>/
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+ token :dot => /\A\./
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#............................................................
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token :newline => /[\n]/
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token :space => /[ \t\r]+/
data/lib/parser.rb CHANGED
@@ -3,8 +3,6 @@ require_relative 'generic_parser'
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3
require_relative 'ast'
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require_relative 'lexer'
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5
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- require 'pp'
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-
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module VHDL_TB
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7
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8
class Parser < GenericParser
@@ -143,24 +141,35 @@ module VHDL_TB
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141
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def parse_type
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type=Identifier.new
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- type.tok=expect(:identifier)
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- if showNext.is_a? :lparen
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- acceptIt
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- name=type.tok
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- type=VectorType.new
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- type.name=name
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- type.lhs=parse_expression
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- if showNext.is_a? [:downto,:to]
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- type.dir=acceptIt
144
+ case showNext.kind
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+ when :identifier
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+ type.tok=expect(:identifier)
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+ if showNext.is_a? :lparen
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+ acceptIt
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+ name=type.tok
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+ type=VectorType.new
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+ type.name=name
152
+ type.lhs=parse_expression
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+ if showNext.is_a? [:downto,:to]
154
+ type.dir=acceptIt
155
+ end
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+ type.rhs=parse_expression
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+ expect :rparen
155
158
end
156
- type.rhs=parse_expression
157
- expect :rparen
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+ else
160
+ type.tok=acceptIt # natural,...
158
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end
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type
160
163
end
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164
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def parse_expression
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- parse_term
166
+ e1=parse_term
167
+ while showNext.is_a? [:plus,:minus,:times,:div]
168
+ op=acceptIt
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+ e2=parse_term
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+ e1=Binary.new(e1,op,e2)
171
+ end
172
+ return e1
164
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end
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def parse_term
data/lib/version.rb ADDED
@@ -0,0 +1,3 @@
1
+ module VHDL_TB
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+ VERSION="0.7.5"
3
+ end
metadata CHANGED
@@ -1,14 +1,14 @@
1
1
--- !ruby/object:Gem::Specification
2
2
name: vhdl_tb
3
3
version: !ruby/object:Gem::Version
4
- version: 0.7.0
4
+ version: 0.7.5
5
5
platform: ruby
6
6
authors:
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7
- Jean-Christophe Le Lann
8
8
autorequire:
9
9
bindir: bin
10
10
cert_chain: []
11
- date: 2018-10-12 00:00:00.000000000 Z
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+ date: 2019-11-08 00:00:00.000000000 Z
12
12
dependencies: []
13
13
description: A simple testbench generator for VHDL
14
14
email: jean-christophe.le_lann@ensta-bretagne.fr
@@ -28,6 +28,7 @@ files:
28
28
- lib/parser.rb
29
29
- lib/template.tb.vhd
30
30
- lib/token.rb
31
+ - lib/version.rb
31
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- tests/circuit.vhd
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homepage: http://rubygems.org/gems/vhdl_tb
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licenses:
@@ -48,8 +49,7 @@ required_rubygems_version: !ruby/object:Gem::Requirement
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- !ruby/object:Gem::Version
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version: '0'
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requirements: []
51
- rubyforge_project:
52
+ rubygems_version: 3.0.6
52
- rubygems_version: 2.7.7
53
53
signing_key:
54
54
specification_version: 4
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55
summary: VHDL Testbench generator